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ARA2008
Reverse Amplifier with Step Attenuator
ADVANCED PRODUCT INFORMATION - Rev 0.0
FEATURES
* * * * * * * * * * * *
Low cost integrated amplifier with step attenuator Attenuation Range: 0-58 dB, adjustable in 1dB increments via a 3 wire serial control Meets DOCSIS distortion requirements at +60dBmV output signal level Low distortion and low noise Frequency range: 5-100MHz 5 Volt operation -40 to +85 0C temperature range MCNS/DOCSIS Compliant Cable Modems CATV Interactive Set-Top Box Telephony over Cable Systems OpenCable Set-Top Box Residential Gateway
APPLICATIONS
20 Pin SSOP Package
PRODUCT DESCRIPTION
The ARA2008 is designed to provide the reverse path amplification and output level control functions in a CATV Set-Top Box or Cable Modem. It incorporates a digitally controlled precision step attenuator that is preceded by an ultra low noise amplifier stage, and followed by an ultra-linear output driver amplifier. This device uses a balanced circuit design that exceeds the MCNS/DOCSIS requirement for harmonic performance at a +60dBmV output level while only
Clock Data Enable
requiring a single polarity +5V supply. Both the input and output are matched to 75 ohms with an appropriate transformer. The precision attenuator provides up to 58 dB of attenuation in 1 dB increments via a three-wire serial interface. With external passive components, this device meets IEC 1000-4-12 and ANSI/IEEE C62.41-1991 100KHz ringwave tests, as well as IEC1000-4-5 1.2/50mS surge tests. The ARA2008 is offered in a 20-pin SSOP package.
Balun
ARA2008
Low Pass Filter
Upstream QPSK/16QAM Modulator
Clock Data
RAM
ROM
5-42 MHz
Transmit Enable/Disable
MAC
Clock 44 MHz Data
Microcontroller with Ethernet MAC
Diplexer
54-860 MHz
DoubleConversion Tuner
SAW Filter
QAM Receiver with FEC
10Base-T Transceiver
RJ45 Connector
Figure 1. Cable Modem or Set Top Box Application Diagram
10/2001
ARA2008
TXEN
32 dB 16 dB 8 dB 4 dB 2 dB 1 dB
RFIN (+) RFIN (-)
RFOUT (+) RFOUT (-)
Buffer CLOCK DATA ENBL
8
6-bit Shift Register
Control Latch
Figure 2: Functional Block Diagram
1 2 3 4 5 6 7 8 9 10
GND VDD1 GND GND RFIN (+) RFIN (-) GND ENBL DATA CLOCK
GND VDD2 TXEN CEXT1 RFOUT (+) RFOUT (-) CEXT2 N/C N/C GND
20 19 18 17 16 15 14 13 12 11
Figure 3: Pin Out - SSOP Package
2
ADVANCED PRODUCT INFORMATION - Rev 0.0 10/2001
ARA2008
Table 1: Pin Description - SSOP Package
PIN 1 2 3 4 5 6 7 8 9 10 N AME GND VDD1 GND GND RFIN (+) RFIN (-) GND ENBL D ATA C LOC K D ESC R IPTION Ground Supply Ground Ground RF (+) Input RF (-) Input Ground Enable D ata C lock PIN 11 12 13 14 15 16 17 18 19 20 N AME GND N/C N/C C EXT2 RFOUT (-) RFOUT (+) C EXT1 TXEN V DD2 GND D ESC R IPTION Ground No connecti on No connecti on External C apaci tor RF (-) Output RF (+) Output External C apaci tor Transmi t Enable Supply Ground
ADVANCED PRODUCT INFORMATION - Rev 0.0 10/2001
3
ARA2008
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PAR AMETER Supply: VDD (pi ns 2, 15, 16, 19)
RF P ower at Inputs (pi ns 5, 6)
MIN 0 -0.5 -55 -
MAX 9 +60 VDD+0.5 +200 260 5
U N IT VD C dBmV V
0
D i gi tal Interface (pi ns 8, 9, 10) Storage Temperature Solderi ng Temperature Solderi ng Ti me
C C
0
S ec
Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability.
Table 3: Operating Ranges
PAR AMETER Supply: VDD (pi ns 2, 15, 16, 19) D i gi tal Interface (pi ns 8, 9, 10) C ase Temperature MIN 4.5 0 -40 TYP 5 25 MAX 7 VDD 85 U N IT VD C V
0
C
The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications.
Table 4: DC Electrical Specifications TA=25C; VDD = +5.0 VDC
PAR AMETER Total Supply C urrent (pi ns 2, 15, 16, 19) Total Power C onsumpti on MIN TYP 135 15 675 75 MAX U N IT mA mW C OMMEN TS Tx enabled (TXEN hi gh) Tx di sabled (TXEN low) Tx enabled (TXEN hi gh) Tx di sabled (TXEN low)
Table 5: Digital Interface Specifications TA=25C; VDD = +5.0 VDC
PAR AMETER Logi c Hi gh Input Voltage: VIN,HIGH Logi c Low Input Voltage: VIN,LOW
4
MIN 2.0 0
TYP -
MAX VDD 0.8
U N IT V V
ADVANCED PRODUCT INFORMATION - Rev 0.0 10/2001
ARA2008 Table 6: AC Electrical Specifications TA=25C; VDD = +5.0 VDC
PAR AMETER Gai n (10 MHz) Gai n Flatness Gai n Vari ati on over Temperature Attenuati on Step Si ze Maxi mum Attenuati on 2nd Harmoni c D i storti on Level (10 MHz) 3rd Harmoni c D i storti on Level (10 MHz) 3rd Order Output Intercept 1 dB Gai n C ompressi on Poi nt Noi se Fi gure Output Noi se Power Acti ve / No Si gnal / Mi n. Atten. Set. Acti ve / No Si gnal / Max. Atten. Set. Isolati on (45 MHz) i n Tx di sable mode D i fferenti al Input Impedance (Tx enabled) Input Impedance (Tx enabled) Input Return Loss (75 Ohms) D i fferenti al Output Impedance Output Impedance Output Return Loss (75 Ohms) Output Voltage Transi ent Tx enable / Tx di sable
MIN 58 78 -
TYP 29 1.5 -0.006 1 68.5 3.0 60 300 75 -15 300 75 -15 4
MAX -53 -53 -38.5 -53.8 100 7
U N IT dB dB dB/C dB dB dB c dB c dBmV dBmV dB dBmV dB Ohms Ohms dB Ohms Ohms dB mVp-p
C OMMEN TS 0 dB attenuati on setti ng 5 to 65 MHz
Monotoni c
+60 dBmV i nto 75 Ohms +60 dBmV i nto 75 Ohms
Includes i nput balun loss Any 160 kHz bandwi dth from 5 to 42 MHz
wi th transformer
wi th transformer
0 dB attenuator setti ng 24 dB attenuator setti ng
ADVANCED PRODUCT INFORMATION - Rev 0.0 10/2001
5
ARA2008
LOGIC PROGRAMMING
Programming Instructions The programming word is set through a 6 bit shift register via the data, clock and enable lines. The data is entered in order with the most significant bit (MSB) first and the least significant bit (LSB) last.
The enable line must be low for the duration of the data entry, then set high to latch the shift register. The rising edge of the clock pulse shifts each data value into the register.
Table 7: Programming Word
D ATA B IT Value
D5 P5
D4 P4
D3 P3
D2 P2
D1 P1
D0 P0
Table 8: Data Description
V AL U E P5 P4 P3 P2 P1 P0
FU N C TION (0 = on, 1 = by pass) 32 dB Attenuator Bi t 16 dB Attenuator Bi t 8 dB Attenuator Bi t 4 dB Attenuator Bi t 2 dB Attenuator Bi t 1 dB Attenuator Bi t
DATA
D5: MSB
D4
D3
D2
D1
D0: LSB
CLOCK
ENBL
Figure 4: Serial Data Input Timing
6
ADVANCED PRODUCT INFORMATION - Rev 0.0 10/2001
ARA2008
APPLICATION INFORMATION
Output Transformer Matching the output of the ARA2008 to a 75 Ohm load is accomplished using a 2:1 turns ratio transformer. In addition to providing an impedance transformation, this transformer provides the bias to the output amplifier stage via the center tap. The transformer also cancels even mode distortion products and common mode signals, such as the voltage transients that occur while enabling and disabling the amplifiers. As a result, care must be taken when selecting the transformer to be used at the output. It must be capable of handling the RF and DC power requirements without saturating the core, and it must have adequate isolation and good phase and amplitude balance. It also must operate over the desired frequency and temperature range for the intended application. ESD Sensitivity Electrostatic discharges can cause permanent damage to this device. Electrostatic charges accumulate on test equipment and the human body, and can discharge without detection. Although the ARA2008 has some built-in ESD protection, proper precautions and handling are strongly recommended. Refer to the ANADIGICS application note on ESD precautions.
ADVANCED PRODUCT INFORMATION - Rev 0.0 10/2001
7
ARA2008
ANADIGICS, Inc.
141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com E-mail: Mktg@anadigics.com IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders.
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited.
WARNING
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ADVANCED PRODUCT INFORMATION - Rev 0.0 10/2001

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